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Home > Archives > Volume 20, No 12 (2022) > Article

DOI: 10.14704/NQ.2022.20.12.NQ77135

FPGA Implementation of Area and Power Optimized and High Speed Seizure Detection System using ELM Classification Method

K.R. Radhakrishnan, M. Amalasweena, T. Kesavamurthy

Abstract

In order to diagnose brain abnormalities, electroencephalography (EEG) signals are employed. The aberrant electrical activation in the nervous system of human which is recorded by these EEG signals defines the epileptic seizures. Seizure sufferers might die suddenly if these epileptic seizures occur at an inappropriate time. It is possible to identify and anticipate epileptic seizures by studying these EEG data signals however it is a difficult process to analyze reliable prediction. As a result, more precise epileptic seizure detection is possible recognition to hardware and real-time FPGA implementation. Brain rhythms in the delta (0–4Hz) and theta (>4Hz) bands were studied separately in this approach, which used the band pass fixed impulse responses. In the application of digital signals processing , multiplication is more priority one its restricted in number and have fixed position on FPGA, which may cause routing delays and lower bit width of optimized soft IP core. This paper presents that soft multiplier IP core of Accurate and Approximate Multipliers instead of MCM multiplication was used in every band of FIR filters and Feature extraction approach and ELM Classification in this suggested study for the reduction of area, power and delay of the EEG data and for classifying normal or epileptic signals. Finally, this suggested study compared all parameters on the basis of delay, power and area, and was developed in Verilog HDL and generated in Xilinx Virtex-5 FPGA.

Keywords

Approximate Computing, Multipliers, FPGA, Electroencephalography (EEG), ELM, Epileptic Seizure, Linear prediction

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