Volume 20 No 22 (2022)
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DESIGN OF INSTRUMENTATION AMPLIFIER OF CMOS CIRCUIT 45nm TECHNOLOGHY FOR DETECTION OF ECG SIGNAL
K Balaramudu , Dr. Pramod Sharma
Abstract
This article provides for an appropriate analog front end to monitoring and managing electrocardiogram (ECG) signals and arrhythmias. The AFE utilizes methodologies for medium-and minimum-capacity architecture and severe voltage levelling to align with ECG signal acquisition schemes in terms for both reduced energy usage and lower input noise requirements. The AFE was built with a three-variable ACwhich offers a multifunction bio-gain and range. The AFE was introduced using a 130 nm CMOS system and has a measured mid-tunable gain of 31 to 52 dB at tunable low pass frequency and high pass section frequencies. For a feedback-reference noise around 2.8 μVrms as well as a power output factor (POF) just 0.5 V of the input impedance is consumed by the electricity at 68 nW. The low noise of 68nW AFE were also paired with a physiological control device for ECG bio-signals. Monitoring techniques for detection of heart rate is used to test the ECG data collected from the AFE
Keywords
electrocardiogram, CMOS, VLSI
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